Japanese Patent Application Laid-Open Publication No. 2005-136246 (Patent Document 1) and International Publication No. 2006/97982 (Patent Document 2) describe a method of electrical inspection (probe inspection) for a semiconductor integrated circuit by pressing a contact terminal of a probe card on an electrode pad of a semiconductor integrated circuit device and describe a probe card used for the method.
Japanese Patent Application Laid-Open Publication No. 2007-134554 (Patent Document 3) describes a probe card including a thin-film sheet in which a plurality of wiring layers are stacked on a contact terminal.
Japanese Patent Application Laid-Open Publication No. 2008-164486 (Patent Document 4) describes a probe card having a thin-film sheet in which a contact terminal and a wiring are electrically connected with each other via a through hole formed on the contact terminal.
Japanese Patent Application Laid-Open Publication No. 2005-302917 (Patent Document 5) describes a probe card in which a dummy wiring not affecting signal transmission is arranged on a thin-film sheet.